New Intel Xeon processors move to a modular structure

Productivity and efficiency; these are the two main aspects of designing the 2024 product line, and according to new data, the manufacturer is doing its best to offer its partners as many variations as possible.

According to the roadmap published at the time of the announcement of the fourth generation Intel Xeon processors, the manufacturer has significantly accelerated its development for servers and data centers, and in the period 2023-2025, not only a change of two generations is expected, but also the foundation is laid for the birth of an entirely new product family .

Data detailed at the HotChips 2023 industry event this time reveals more about the chips expected to arrive in the form of the sixth generation Xeon. The launch of Sierra Forest in the first half of 2024 is in itself a significant milestone for the company as it targets an area where competitors with off-the-shelf platforms are already present and is growing in importance, both from a business and use.

Just what you need

By the way, the modular indicator is not so surprising, it can be run even with central microcircuits based on the old multi-chip design, but in the case of new products, such a design structure can be approached and checked from several sides. Anyone who already has a 12th or 13th generation Intel Core processor in their home computer knows how P- and E-cores work, how they work, and seems to be satisfied with the resulting performance. In the case of Xeon, Intel does not continue the architecture used for desktop processors, but divides the product line into two, depending on the architecture and type of cores.

The already mentioned Sierra Forest is built exclusively on E-cores, the processor can contain up to 114 Crestmont cores, which can be used to build one- or two-socket data center servers. The so-called Groups of cores placed in Compute chipsets can contain 2-4 computing units each, the whole configuration combines 36 such small units, however 144 cores do not support Hyper-Threading technology. The cores have 144 MB of L2 cache, which is complemented by 108 MB of shared (L3) cache. Support for an eight-channel DDR5 memory controller and the PCIe 5.0 standard is not surprising, but the maximum TDP frame of 350W is already more interesting compared to 144 cores; The goal is clearly to be able to deploy AMD Epyc “Bergamo” based on Zen 4c in the cloud and efficiently accelerate workflows there.

On the other hand, Granite Rapids using P-cores will be a real beast, optimized for AI-based acceleration and resource-intensive tasks. Intel has been a little quiet about this development, neither the number of cores in one package, nor the capacity of the caches have been finalized, presumably the designs that will actually be available to server partners have not yet been fully tested. However, it’s safe to say that the improvements made at the Redwood Cove core architecture level are needed over current and future generations of AMD EPYC, and Intel 3 manufacturing technology will hopefully provide the necessary foundation for that.

Draw a card for 5?

Going by the current schedule, from a layman’s perspective, the timeline seems pretty tight, as Gen 5’s Emerald Rapids (sort of a 4th generation tweak) will arrive ahead of Sierra Forest, with slightly more cores and basically three times the L3 cache. However, given the wide range of computing and energy efficiency needs, this pace is absolutely appropriate, while Intel also needs to pay attention to the knowledge and net benefits of EPYC platforms. In 2024, AMD will start development, codenamed Turin, which will already be based on the Zen 5 architecture. It will be an exciting fight!

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